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Jake's Electronics

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Configuration Word for PIC16F737/747/767/777

Select Device:

   PIC16F737

   PIC16F747

   PIC16F767

   PIC16F777

Configuration Word Register 1 (ADDRESS 2007h)
CP
CCPMX
DEBUG
_
_
BORV1
BORV0
BOREN
MCLRE
FOSC2
PWRTEN
WDTEN
FOSC1
FOSC0
bit 13
bit 0

bit 13:

CP: Flash Program Memory Code Protection bits

   1 = Code protection off

   0 = 0000h to 1FFFh code-protected for PIC16F767/777 and 0000h to 0FFFh for PIC16F737/747 (all protected)

bit 12:

CCPMX: CCP2 Multiplex bit

   1 = CCP2 is on RC1

   0 = CCP2 is on RB3

bit 11:

DEBUG: In-Circuit Debugger Mode bit

   1 = In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins

   0 = In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger

bit 10-9:

Unimplemented: Read as '1'

bit 8-7:

BORV<1:0>: Brown-out Reset Voltage bits

   11 = VBOR set to 2.0V

   10 = VBOR set to 2.7V

   01 = VBOR set to 4.2V

   00 = VBOR set to 4.5V

bit 6:

BOREN: Brown-out Reset Enable bit

BOREN combines with BORSEN to control when BOR is enabled and how it is controlled.

BOREN:BORSEN:

   11 = BOR enabled and always on

   10 = BOR enabled during operation and disabled during Sleep by hardware

   01 = BOR controlled by software bit SBOREN - refer to Register 2-8 (PCON<2>)

   00 = BOR disabled

bit 5:

MCLRE: MCLR/VPP/RE3 Pin Function Select bit

   1 = MCLR/VPP/RE3 pin function is MCLR

   0 = MCLR/VPP/RE3 pin function is digital input only, MCLR gated to '1'

bit 3:

PWRTEN: Power-up Timer Enable bit

   1 = PWRT disabled

   0 = PWRT enabled

bit 2:

WDTEN: Watchdog Timer Enable bit

   1 = WDT enabled

   0 = WDT disabled

bit 4, 1-0:

FOSC2:FOSC0: Oscillator Selection bits

   111 = EXTRC oscillator; CLKO function on OSC2/CLKO/RA6

   110 = EXTRC oscillator; port I/O function on OSC2/CLKO/RA6

   101 = INTRC oscillator; CLKO function on OSC2/CLKO/RA6 and port I/O function on OSC1/CLKI/RA7

   100 = INTRC oscillator; port I/O function on OSC1/CLKI/RA7 and OSC2/CLKO/RA6

   011 = EXTCLK; port I/O function on OSC2/CLKO/RA6

   010 = HS oscillator

   001 = XT oscillator

   000 = LP oscillator

Configuration Word Register 2 (ADDRESS 2008h)
_
_
_
_
_
_
_
BORSEN
_
_
_
_
IESO
FCMEN
bit 13
bit 0

bit 13-7:

Unimplemented: Read as '1'

bit 6:

BORSEN: Brown-out Reset Software Enable bit

Refer to Configuration Word Register 1, bit 6 for the function of this bit.

bit 5-2:

Unimplemented: Read as '1'

bit 1:

IESO: Internal External Switchover bit

   1 = Internal External Switchover mode enabled

   0 = Internal External Switchover mode disabled

bit 0:

FCMEN: Fail-Safe Clock Monitor Enable bit

   1 = Fail-Safe Clock Monitor enabled

   0 = Fail-Safe Clock Monitor disabled

Complete Header with Configuration Word and Pin Diagram:

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